This commit is contained in:
Vasily Markov 2024-05-13 15:02:23 +03:00
parent 93b305123f
commit 65ca4d8ddb
23 changed files with 170 additions and 12472 deletions

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@ -3,10 +3,21 @@
void app() {
init_LWIP();
static uint32_t loop_cnt = 0;
printf("FLASH->ACR: %d\r\n", FLASH->ACR);
printf("RCC->CFGR: %d\r\n", RCC->CFGR);
printf("RCC->CR): %d\r\n", RCC->CR);
printf("RCC->PLLCFGR: %d\r\n", RCC->PLLCFGR);
printf("RCC->APB1ENR: %d\r\n", RCC->APB1ENR);
while(1) {
process_LWIP();
delay(400);
// if(loop_cnt == 10000) {
// GPIO_ToggleBits(GPIOB, GPIO_Pin_14);
// loop_cnt = 0;
// }
// loop_cnt++;
GPIO_ToggleBits(GPIOB, GPIO_Pin_14);
delay(1000);
};
}

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@ -88,9 +88,13 @@ int _write(__attribute__((unused)) int file, char *ptr, int len)
while(i < len) {
while (USART_GetFlagStatus(USART2, USART_FLAG_TXE) == RESET);
USART_SendData(USART2, *ptr++);
i++;
// ringbuf_uint8t* printf_buffer = get_printf_buffer();
// if (!rb_is_full(printf_buffer)) {
// rb_put(printf_buffer, *ptr++);
// }
i++;
}
// USART2->CR1 |= USART_CR1_TXEIE;
return len;
}

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@ -4,10 +4,11 @@ set(LWIP_SOURCES ${CMAKE_CURRENT_SOURCE_DIR}/lwip/src/core)
add_library(bsp STATIC
bsp.c
ring_buffer.c
stm32f4xx_it.c
lwip/lwip.c
lwip/ethernetif.c
lwip/stm32f4_eth_periph/src/stm32f4xx_hal_eth.c
lwip/stm32f4xx_hal_eth.c
${LWIP_SOURCE_DIR}/api/err.c
${LWIP_SOURCE_DIR}/core/def.c
${LWIP_SOURCE_DIR}/core/init.c
@ -34,7 +35,6 @@ target_include_directories(bsp PRIVATE
${LWIP_INCLUDES}
${LWIP_INCLUDES}/lwip
${LWIP_INCLUDES}/netif
${LWIP_INCLUDES}/stm32f4_eth_periph/inc
)
target_link_libraries(bsp PUBLIC

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@ -1,7 +1,16 @@
#include "misc.h"
#include "bsp.h"
#define MAX_DELAY 0xFFFFFFFU
#define PRINTF_BUFFER_SIZE 128
static uint8_t printf_buffer[PRINTF_BUFFER_SIZE];
static ringbuf_uint8t ring_buffer;
ringbuf_uint8t* get_printf_buffer() {
return &ring_buffer;
}
static lwip_status_t lwip_status = {.link_status = LINK_DOWN};
@ -59,6 +68,10 @@ void usart_init() {
usart.USART_BaudRate = 115200;
usart.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
USART_Init(USART2, &usart);
// USART_ITConfig(USART2, USART_IT_TXE, ENABLE);
// NVIC_SetPriority(USART2_IRQn, 0);
// NVIC_EnableIRQ(USART2_IRQn);
USART_Cmd(USART2, ENABLE);
}
@ -86,21 +99,7 @@ void tim_init() {
}
void dma_init() {
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE);
DMA_InitTypeDef dma;
dma.DMA_Channel = DMA_Channel_0;
dma.DMA_DIR = DMA_DIR_MemoryToMemory;
dma.DMA_PeripheralInc = DMA_PeripheralInc_Enable;
dma.DMA_MemoryInc = DMA_MemoryInc_Enable;
dma.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
dma.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
dma.DMA_Mode = DMA_Mode_Normal;
dma.DMA_Priority = DMA_Priority_Low;
dma.DMA_FIFOMode = DMA_FIFOMode_Enable;
dma.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
dma.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
dma.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_Init(DMA2_Stream0, &dma);
}
void eth_init() {
@ -144,16 +143,20 @@ void eth_init() {
void board_init() {
uint32_t tick = SystemCoreClock/1000 - 1;
__enable_irq();
FLASH_PrefetchBufferCmd(ENABLE);
SysTick_Config(tick);
NVIC_EnableIRQ(SysTick_IRQn);
gpio_init();
usart_init();
// dma_init();
eth_init();
init_LWIP();
tim_init();
rb_init(&ring_buffer, printf_buffer, PRINTF_BUFFER_SIZE);
printf("SysClk: %d\r\n", SystemCoreClock);
printf("Controller is started...\r\n");
}

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@ -7,7 +7,9 @@
#include "stm32f4xx_rcc.h"
#include "stm32f4xx_dma.h"
#include "stm32f4xx_tim.h"
#include "stm32f4xx_flash.h"
#include "lwip/lwip.h"
#include "ring_buffer.h"
typedef enum {
LINK_DOWN,
@ -23,4 +25,5 @@ uint32_t getRegister();
uint32_t getSysTick();
void delay(uint32_t);
lwip_status_t* get_lwip_status();
ringbuf_uint8t* get_printf_buffer();
#endif

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@ -1,41 +0,0 @@
cmake_minimum_required(VERSION 3.5)
project(lwip)
set(LWIP_SOURCE_DIR ${CMAKE_SOURCE_DIR}/lwip)
file(GLOB_RECURSE LWIP_SOURCES
${LWIP_SOURCE_DIR}/src/core/*.c
${LWIP_SOURCE_DIR}/src/netif/*.c
)
# message(${LWIP_SOURCES})
add_library(lwip STATIC
lwip.c
# ethernetif.c
# stm32f4_eth_periph/src/stm32f4xx_hal_eth.c
# src/core/init.c
# src/core/init.c
# src/core/mem.c
# src/core/memp.c
# src/core/netif.c
# src/core/pbuf.c
# src/core/udp.c
# src/netif/ethernet.c
${LWIP_SOURCES}
)
# target_link_libraries(lwip PRIVATE stm32f4xx)
set(DEVICE_FAMILY STM32F439xx)
target_compile_definitions(lwip PUBLIC ${DEVICE_FAMILY})
target_include_directories(lwip PUBLIC
# ../bsp
# stm32f4_eth_periph/inc
# stm32f4_eth_periph/Legacy
src/include/lwip
src/include
system/
./
)

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@ -132,7 +132,7 @@ static void low_level_init(struct netif *netif)
printf("LAN8742A interface is RMII\r\r\n");
hal_eth_init_status = HAL_ETH_Init(&heth);
printf("Status: %d\r\n", hal_eth_init_status);
if (hal_eth_init_status == HAL_OK)
{
/* Set netif link flag */
@ -182,7 +182,6 @@ static void low_level_init(struct netif *netif)
/* Read Register Configuration */
HAL_ETH_ReadPHYRegister(&heth, PHY_ISFR , &regvalue);
printf("Link: %d\r\n", regvalue);
#endif
@ -389,25 +388,26 @@ void check_link_status(struct netif* netif) {
*/
void ethernetif_input(struct netif *netif)
{
// err_t err;
// struct pbuf *p;
// uint32_t regvalue = 0;
// /* move received packet into a new pbuf */
// p = low_level_input(netif);
netif_set_link_callback(netif, ethernetif_update_config);
err_t err;
struct pbuf *p;
uint32_t regvalue = 0;
/* move received packet into a new pbuf */
p = low_level_input(netif);
// if (p == NULL) printf("Null\r\n");
// netif_set_link_callback(netif, ethernetif_update_config);
check_link_status(netif);
// /* no packet could be read, silently ignore this */
// if (p == NULL) return;
/* no packet could be read, silently ignore this */
if (p == NULL) return;
// // /* entry point to the LwIP stack */
// err = netif->input(p, netif);
/* entry point to the LwIP stack */
err = netif->input(p, netif);
// if (err != ERR_OK)
// {
// LWIP_DEBUGF(NETIF_DEBUG, ("ethernetif_input: IP input error\n"));
// pbuf_free(p);
// p = NULL;
// }
if (err != ERR_OK)
{
LWIP_DEBUGF(NETIF_DEBUG, ("ethernetif_input: IP input error\n"));
pbuf_free(p);
p = NULL;
}
}
#if !LWIP_ARP

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@ -5,8 +5,8 @@
#include "lwip/mem.h"
#include "lwip/memp.h"
#include "lwip/udp.h"
#include "netif/etharp.h"
#include "lwip/timeouts.h"
#include "netif/etharp.h"
#include "ethernetif.h"
void Error_Handler(void);
@ -65,6 +65,6 @@ void init_LWIP(void)
void process_LWIP()
{
ethernetif_input(&gnetif);
// sys_check_timeouts();
sys_check_timeouts();
}

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@ -88,7 +88,7 @@
/*----- Value in opt.h for LWIP_ETHERNET: LWIP_ARP || PPPOE_SUPPORT -*/
#define LWIP_ETHERNET 1
/*----- Default Value for LWIP_DHCP_CHECK_LINK_UP: 0 ---*/
#define LWIP_DHCP_CHECK_LINK_UP 1
#define LWIP_DHCP_CHECK_LINK_UP 0
/*----- Value in opt.h for LWIP_DNS_SECURE: (LWIP_DNS_SECURE_RAND_XID | LWIP_DNS_SECURE_NO_MULTIPLE_OUTSTANDING | LWIP_DNS_SECURE_RAND_SRC_PORT) -*/
#define LWIP_DNS_SECURE 7
/*----- Value in opt.h for TCP_SND_QUEUELEN: (4*TCP_SND_BUF + (TCP_MSS - 1))/TCP_MSS -----*/
@ -150,6 +150,10 @@
#define LWIP_TCP 0
#define LWIP_NETIF_LINK_CALLBACK 1
#define PBUF_POOL_SIZE 8
#define PBUF_POOL_BUFSIZE 512
/* USER CODE END 1 */
#ifdef __cplusplus

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@ -416,7 +416,6 @@ do_memp_free_pool(const struct memp_desc* desc, void *mem)
memp = (struct memp *)(void *)((u8_t*)mem - MEMP_SIZE);
SYS_ARCH_PROTECT(old_level);
#if MEMP_OVERFLOW_CHECK == 1
memp_overflow_check_element_overflow(memp, desc);
memp_overflow_check_element_underflow(memp, desc);
@ -485,9 +484,7 @@ memp_free(memp_t type, void *mem)
#ifdef LWIP_HOOK_MEMP_AVAILABLE
old_first = *memp_pools[type]->tab;
#endif
do_memp_free_pool(memp_pools[type], mem);
#ifdef LWIP_HOOK_MEMP_AVAILABLE
if (old_first == NULL) {
LWIP_HOOK_MEMP_AVAILABLE(type);

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@ -207,7 +207,6 @@ sys_timeout(u32_t msecs, sys_timeout_handler handler, void *arg)
{
struct sys_timeo *timeout, *t;
u32_t now, diff;
timeout = (struct sys_timeo *)memp_malloc(MEMP_SYS_TIMEOUT);
if (timeout == NULL) {
LWIP_ASSERT("sys_timeout: timeout != NULL, pool MEMP_SYS_TIMEOUT is empty", timeout != NULL);

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@ -181,7 +181,7 @@ HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth)
uint32_t hclk = 60000000U;
uint32_t tickstart = 0U;
uint32_t err = ETH_SUCCESS;
printf("Ethernet init\r\n");
/* Check the ETH peripheral state */
if(heth == NULL)
{
@ -308,7 +308,7 @@ HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth)
{
/* In case of write timeout */
err = ETH_ERROR;
printf("mac timeout\r\n");
/* Config MAC and DMA */
ETH_MACDMAConfig(heth, err);
@ -1602,7 +1602,6 @@ static void ETH_MACDMAConfig(ETH_HandleTypeDef *heth, uint32_t err)
ETH_MACInitTypeDef macinit;
ETH_DMAInitTypeDef dmainit;
uint32_t tmpreg1 = 0U;
if (err != ETH_SUCCESS) /* Auto-negotiation failed */
{
/* Set Ethernet duplex mode to Full-duplex */

58
bsp/ring_buffer.c Normal file
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@ -0,0 +1,58 @@
#include "ring_buffer.h"
///////////////////////// UINT8_T RING BUFFER //////////////////////////////
//initializes the given ringbuffer with the supplied array and its length
inline void rb_init(ringbuf_uint8t *rb, uint8_t *array, unsigned char length)
{
rb->buf = array;
rb->length = length;
rb->head = rb->tail = 0;
// zero out buffer
for (uint8_t idx=0; idx < length; ++idx){
rb->buf[idx] = 0;
}
}
//returns boolean true if the ringbuffer is empty, false otherwise
inline unsigned char rb_is_empty(ringbuf_uint8t *rb)
{
return (rb->head == rb->tail);
}
//returns boolean true if the ringbuffer is full, false otherwise
inline unsigned char rb_is_full(ringbuf_uint8t *rb)
{
return (((rb->tail + 1) % rb->length) == rb->head);
}
//consumes an element from the buffer
//returns NULL if buffer is empty or a pointer to the array element otherwise
inline uint8_t* rb_get(ringbuf_uint8t *rb)
{
uint8_t *ret;
if (rb->head == rb->tail)
return 0;
else
{
ret = rb->buf + rb->head; //index into the array at head pointer
rb->head = (rb->head + 1) % rb->length; //move head pointer forward one element (with wraparound)
return ret;
}
}
//puts an element into the buffer
//returns 0 if buffer is full, otherwise returns 1
inline unsigned char rb_put(ringbuf_uint8t *rb, uint8_t c)
{
char newtail;
newtail = (rb->tail + 1) % rb->length; //calculate where the new tail would be
if (newtail == rb->head) //if the new tail would make the buffer look empty, buffer is full
return 0;
else
{
rb->buf[rb->tail] = c; //store the data
rb->tail = newtail; //move the tail pointer forward (with wraparound)
return 1;
}
}

30
bsp/ring_buffer.h Normal file
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@ -0,0 +1,30 @@
#ifndef RING_BUFFER_H
#define RING_BUFFER_H
#include <stdint.h>
///////////////////////// UINT8_T RING BUFFER //////////////////////////////
typedef struct {
uint8_t *buf; //points to data array
unsigned char length; //length of data array
unsigned char head, tail; //producer and consumer indices
} ringbuf_uint8t;
//initializes the given ringbuffer with the supplied array and its length
void rb_init(ringbuf_uint8t *rb, uint8_t *array, unsigned char length);
//returns boolean true if the ringbuffer is empty, false otherwise
unsigned char rb_is_empty(ringbuf_uint8t *rb);
//returns boolean true if the ringbuffer is full, false otherwise
unsigned char rb_is_full(ringbuf_uint8t *rb);
//consumes an element from the buffer
//returns NULL if buffer is empty or a pointer to the array element otherwise
uint8_t* rb_get(ringbuf_uint8t *rb);
//puts an element into the buffer
//returns 0 if buffer is full, otherwise returns 1
unsigned char rb_put(ringbuf_uint8t *rb, uint8_t c);
#endif

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@ -1,4 +1,5 @@
#include "stm32f4xx_it.h"
#include "ring_buffer.h"
static volatile uint32_t sysTick = 0;
@ -16,7 +17,13 @@ void TIM7_IRQHandler()
void USART2_IRQHandler()
{
ringbuf_uint8t* printf_buffer = get_printf_buffer();
while(!rb_is_empty(printf_buffer)) {
while (USART_GetFlagStatus(USART2, USART_FLAG_TXE) == RESET);
USART_SendData(USART2, (uint16_t)(rb_get(printf_buffer)));
}
USART1->CR1 &= ~USART_CR1_TXEIE;
GPIO_ToggleBits(GPIOB, GPIO_Pin_7);
}
void SysTick_Handler(void)

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@ -20,7 +20,7 @@ add_library(stm32f4xx STATIC
# src/STM32F4xx_StdPeriph_Driver/stm32f4xx_dcmi.c
src/STM32F4xx_StdPeriph_Driver/stm32f4xx_dma.c
# src/STM32F4xx_StdPeriph_Driver/stm32f4xx_exti.c
# src/STM32F4xx_StdPeriph_Driver/stm32f4xx_flash.c
src/STM32F4xx_StdPeriph_Driver/stm32f4xx_flash.c
# src/STM32F4xx_StdPeriph_Driver/stm32f4xx_fsmc.c
src/STM32F4xx_StdPeriph_Driver/stm32f4xx_gpio.c
# src/STM32F4xx_StdPeriph_Driver/stm32f4xx_hash.c
@ -52,7 +52,7 @@ target_include_directories(stm32f4xx PUBLIC
target_compile_definitions(stm32f4xx PUBLIC USE_STDPERIPH_DRIVER)
target_compile_definitions(stm32f4xx PUBLIC ${DEVICE_FAMILY})
target_compile_definitions(stm32f4xx PUBLIC HSE_VALUE=8000000)
target_compile_definitions(stm32f4xx PUBLIC SYSTEM_CORE_CLOCK=180000000)
target_compile_definitions(stm32f4xx PUBLIC SYSTEM_CORE_CLOCK=160000000)
target_compile_definitions(stm32f4xx PUBLIC USE_STM324x7I_EVAL)
target_compile_options(stm32f4xx PRIVATE -nostartfiles)

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