792 lines
33 KiB
Plaintext
792 lines
33 KiB
Plaintext
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build/bin/stm32.elf: file format elf32-littlearm
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Disassembly of section .isr_vector:
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08000000 <g_pfnVectors>:
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8000000: 20030000 andcs r0, r3, r0
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8000004: 080004d1 stmdaeq r0, {r0, r4, r6, r7, sl}
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8000008: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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800000c: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000010: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000014: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000018: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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...
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800002c: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000030: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000034: 00000000 andeq r0, r0, r0
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8000038: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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800003c: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000040: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000044: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000048: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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800004c: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000050: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000054: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000058: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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800005c: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000060: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000064: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000068: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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800006c: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000070: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000074: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000078: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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800007c: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000080: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000084: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000088: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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800008c: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000090: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000094: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000098: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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800009c: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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80000a0: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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80000a4: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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80000a8: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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80000ac: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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80000b0: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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80000b4: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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80000b8: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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80000bc: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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80000c0: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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80000c4: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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80000c8: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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80000cc: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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80000d0: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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80000d4: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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80000d8: 08000197 stmdaeq r0, {r0, r1, r2, r4, r7, r8}
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80000dc: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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80000e0: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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80000e4: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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80000e8: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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80000ec: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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80000f0: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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80000f4: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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80000f8: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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80000fc: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000100: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000104: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000108: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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800010c: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000110: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000114: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000118: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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800011c: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000120: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000124: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000128: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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800012c: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000130: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000134: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000138: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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800013c: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000140: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000144: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000148: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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800014c: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000150: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000154: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000158: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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800015c: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000160: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000164: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000168: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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800016c: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000170: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000174: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000178: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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800017c: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000180: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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8000184: 08000515 stmdaeq r0, {r0, r2, r4, r8, sl}
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Disassembly of section .text:
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08000188 <main>:
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8000188: b580 push {r7, lr}
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800018a: af00 add r7, sp, #0
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800018c: f000 f81f bl 80001ce <board_init>
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8000190: 2300 movs r3, #0
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8000192: 4618 mov r0, r3
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8000194: bd80 pop {r7, pc}
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08000196 <USART2_IRQHandler>:
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8000196: b480 push {r7}
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8000198: af00 add r7, sp, #0
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800019a: bf00 nop
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800019c: 46bd mov sp, r7
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800019e: f85d 7b04 ldr.w r7, [sp], #4
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80001a2: 4770 bx lr
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080001a4 <gpio_init>:
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80001a4: b480 push {r7}
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80001a6: af00 add r7, sp, #0
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80001a8: bf00 nop
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80001aa: 46bd mov sp, r7
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80001ac: f85d 7b04 ldr.w r7, [sp], #4
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80001b0: 4770 bx lr
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080001b2 <usart_init>:
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80001b2: b480 push {r7}
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80001b4: af00 add r7, sp, #0
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80001b6: bf00 nop
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80001b8: 46bd mov sp, r7
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80001ba: f85d 7b04 ldr.w r7, [sp], #4
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80001be: 4770 bx lr
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080001c0 <eth_init>:
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80001c0: b480 push {r7}
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80001c2: af00 add r7, sp, #0
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80001c4: bf00 nop
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80001c6: 46bd mov sp, r7
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80001c8: f85d 7b04 ldr.w r7, [sp], #4
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80001cc: 4770 bx lr
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080001ce <board_init>:
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80001ce: b480 push {r7}
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80001d0: af00 add r7, sp, #0
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80001d2: bf00 nop
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80001d4: 46bd mov sp, r7
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80001d6: f85d 7b04 ldr.w r7, [sp], #4
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80001da: 4770 bx lr
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080001dc <SystemInit>:
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80001dc: b580 push {r7, lr}
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80001de: af00 add r7, sp, #0
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80001e0: 4b16 ldr r3, [pc, #88] @ (800023c <SystemInit+0x60>)
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80001e2: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88
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80001e6: 4a15 ldr r2, [pc, #84] @ (800023c <SystemInit+0x60>)
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80001e8: f443 0370 orr.w r3, r3, #15728640 @ 0xf00000
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80001ec: f8c2 3088 str.w r3, [r2, #136] @ 0x88
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80001f0: 4b13 ldr r3, [pc, #76] @ (8000240 <SystemInit+0x64>)
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80001f2: 681b ldr r3, [r3, #0]
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80001f4: 4a12 ldr r2, [pc, #72] @ (8000240 <SystemInit+0x64>)
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80001f6: f043 0301 orr.w r3, r3, #1
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80001fa: 6013 str r3, [r2, #0]
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80001fc: 4b10 ldr r3, [pc, #64] @ (8000240 <SystemInit+0x64>)
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80001fe: 2200 movs r2, #0
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8000200: 609a str r2, [r3, #8]
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8000202: 4b0f ldr r3, [pc, #60] @ (8000240 <SystemInit+0x64>)
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8000204: 681b ldr r3, [r3, #0]
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8000206: 4a0e ldr r2, [pc, #56] @ (8000240 <SystemInit+0x64>)
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8000208: f023 7384 bic.w r3, r3, #17301504 @ 0x1080000
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800020c: f423 3380 bic.w r3, r3, #65536 @ 0x10000
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8000210: 6013 str r3, [r2, #0]
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8000212: 4b0b ldr r3, [pc, #44] @ (8000240 <SystemInit+0x64>)
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8000214: 4a0b ldr r2, [pc, #44] @ (8000244 <SystemInit+0x68>)
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8000216: 605a str r2, [r3, #4]
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8000218: 4b09 ldr r3, [pc, #36] @ (8000240 <SystemInit+0x64>)
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800021a: 681b ldr r3, [r3, #0]
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800021c: 4a08 ldr r2, [pc, #32] @ (8000240 <SystemInit+0x64>)
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800021e: f423 2380 bic.w r3, r3, #262144 @ 0x40000
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8000222: 6013 str r3, [r2, #0]
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8000224: 4b06 ldr r3, [pc, #24] @ (8000240 <SystemInit+0x64>)
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8000226: 2200 movs r2, #0
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8000228: 60da str r2, [r3, #12]
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800022a: f000 f88f bl 800034c <SetSysClock>
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800022e: 4b03 ldr r3, [pc, #12] @ (800023c <SystemInit+0x60>)
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8000230: f04f 6200 mov.w r2, #134217728 @ 0x8000000
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8000234: 609a str r2, [r3, #8]
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8000236: bf00 nop
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8000238: bd80 pop {r7, pc}
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800023a: bf00 nop
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800023c: e000ed00 and lr, r0, r0, lsl #26
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8000240: 40023800 andmi r3, r2, r0, lsl #16
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8000244: 24003010 strcs r3, [r0], #-16
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08000248 <SystemCoreClockUpdate>:
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8000248: b480 push {r7}
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800024a: b087 sub sp, #28
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800024c: af00 add r7, sp, #0
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800024e: 2300 movs r3, #0
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8000250: 613b str r3, [r7, #16]
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8000252: 2300 movs r3, #0
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8000254: 617b str r3, [r7, #20]
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8000256: 2302 movs r3, #2
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8000258: 60fb str r3, [r7, #12]
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800025a: 2300 movs r3, #0
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800025c: 60bb str r3, [r7, #8]
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800025e: 2302 movs r3, #2
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8000260: 607b str r3, [r7, #4]
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8000262: 4b35 ldr r3, [pc, #212] @ (8000338 <SystemCoreClockUpdate+0xf0>)
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8000264: 689b ldr r3, [r3, #8]
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8000266: f003 030c and.w r3, r3, #12
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800026a: 613b str r3, [r7, #16]
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800026c: 693b ldr r3, [r7, #16]
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800026e: 2b08 cmp r3, #8
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8000270: d011 beq.n 8000296 <SystemCoreClockUpdate+0x4e>
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8000272: 693b ldr r3, [r7, #16]
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8000274: 2b08 cmp r3, #8
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8000276: d844 bhi.n 8000302 <SystemCoreClockUpdate+0xba>
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8000278: 693b ldr r3, [r7, #16]
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800027a: 2b00 cmp r3, #0
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800027c: d003 beq.n 8000286 <SystemCoreClockUpdate+0x3e>
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800027e: 693b ldr r3, [r7, #16]
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8000280: 2b04 cmp r3, #4
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8000282: d004 beq.n 800028e <SystemCoreClockUpdate+0x46>
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8000284: e03d b.n 8000302 <SystemCoreClockUpdate+0xba>
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8000286: 4b2d ldr r3, [pc, #180] @ (800033c <SystemCoreClockUpdate+0xf4>)
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8000288: 4a2d ldr r2, [pc, #180] @ (8000340 <SystemCoreClockUpdate+0xf8>)
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800028a: 601a str r2, [r3, #0]
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800028c: e03d b.n 800030a <SystemCoreClockUpdate+0xc2>
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800028e: 4b2b ldr r3, [pc, #172] @ (800033c <SystemCoreClockUpdate+0xf4>)
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8000290: 4a2c ldr r2, [pc, #176] @ (8000344 <SystemCoreClockUpdate+0xfc>)
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8000292: 601a str r2, [r3, #0]
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8000294: e039 b.n 800030a <SystemCoreClockUpdate+0xc2>
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8000296: 4b28 ldr r3, [pc, #160] @ (8000338 <SystemCoreClockUpdate+0xf0>)
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8000298: 685b ldr r3, [r3, #4]
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800029a: 0d9b lsrs r3, r3, #22
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800029c: f003 0301 and.w r3, r3, #1
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80002a0: 60bb str r3, [r7, #8]
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80002a2: 4b25 ldr r3, [pc, #148] @ (8000338 <SystemCoreClockUpdate+0xf0>)
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80002a4: 685b ldr r3, [r3, #4]
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80002a6: f003 033f and.w r3, r3, #63 @ 0x3f
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80002aa: 607b str r3, [r7, #4]
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80002ac: 68bb ldr r3, [r7, #8]
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80002ae: 2b00 cmp r3, #0
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80002b0: d00c beq.n 80002cc <SystemCoreClockUpdate+0x84>
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80002b2: 4a24 ldr r2, [pc, #144] @ (8000344 <SystemCoreClockUpdate+0xfc>)
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80002b4: 687b ldr r3, [r7, #4]
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80002b6: fbb2 f3f3 udiv r3, r2, r3
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80002ba: 4a1f ldr r2, [pc, #124] @ (8000338 <SystemCoreClockUpdate+0xf0>)
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80002bc: 6852 ldr r2, [r2, #4]
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80002be: 0992 lsrs r2, r2, #6
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80002c0: f3c2 0208 ubfx r2, r2, #0, #9
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80002c4: fb02 f303 mul.w r3, r2, r3
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80002c8: 617b str r3, [r7, #20]
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80002ca: e00b b.n 80002e4 <SystemCoreClockUpdate+0x9c>
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80002cc: 4a1c ldr r2, [pc, #112] @ (8000340 <SystemCoreClockUpdate+0xf8>)
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80002ce: 687b ldr r3, [r7, #4]
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80002d0: fbb2 f3f3 udiv r3, r2, r3
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80002d4: 4a18 ldr r2, [pc, #96] @ (8000338 <SystemCoreClockUpdate+0xf0>)
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80002d6: 6852 ldr r2, [r2, #4]
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80002d8: 0992 lsrs r2, r2, #6
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80002da: f3c2 0208 ubfx r2, r2, #0, #9
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80002de: fb02 f303 mul.w r3, r2, r3
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80002e2: 617b str r3, [r7, #20]
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80002e4: 4b14 ldr r3, [pc, #80] @ (8000338 <SystemCoreClockUpdate+0xf0>)
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80002e6: 685b ldr r3, [r3, #4]
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80002e8: 0c1b lsrs r3, r3, #16
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80002ea: f003 0303 and.w r3, r3, #3
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80002ee: 3301 adds r3, #1
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80002f0: 005b lsls r3, r3, #1
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80002f2: 60fb str r3, [r7, #12]
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80002f4: 697a ldr r2, [r7, #20]
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80002f6: 68fb ldr r3, [r7, #12]
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80002f8: fbb2 f3f3 udiv r3, r2, r3
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80002fc: 4a0f ldr r2, [pc, #60] @ (800033c <SystemCoreClockUpdate+0xf4>)
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80002fe: 6013 str r3, [r2, #0]
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8000300: e003 b.n 800030a <SystemCoreClockUpdate+0xc2>
|
|
8000302: 4b0e ldr r3, [pc, #56] @ (800033c <SystemCoreClockUpdate+0xf4>)
|
|
8000304: 4a0e ldr r2, [pc, #56] @ (8000340 <SystemCoreClockUpdate+0xf8>)
|
|
8000306: 601a str r2, [r3, #0]
|
|
8000308: bf00 nop
|
|
800030a: 4b0b ldr r3, [pc, #44] @ (8000338 <SystemCoreClockUpdate+0xf0>)
|
|
800030c: 689b ldr r3, [r3, #8]
|
|
800030e: 091b lsrs r3, r3, #4
|
|
8000310: f003 030f and.w r3, r3, #15
|
|
8000314: 4a0c ldr r2, [pc, #48] @ (8000348 <SystemCoreClockUpdate+0x100>)
|
|
8000316: 5cd3 ldrb r3, [r2, r3]
|
|
8000318: b2db uxtb r3, r3
|
|
800031a: 613b str r3, [r7, #16]
|
|
800031c: 4b07 ldr r3, [pc, #28] @ (800033c <SystemCoreClockUpdate+0xf4>)
|
|
800031e: 681a ldr r2, [r3, #0]
|
|
8000320: 693b ldr r3, [r7, #16]
|
|
8000322: fa22 f303 lsr.w r3, r2, r3
|
|
8000326: 4a05 ldr r2, [pc, #20] @ (800033c <SystemCoreClockUpdate+0xf4>)
|
|
8000328: 6013 str r3, [r2, #0]
|
|
800032a: bf00 nop
|
|
800032c: 371c adds r7, #28
|
|
800032e: 46bd mov sp, r7
|
|
8000330: f85d 7b04 ldr.w r7, [sp], #4
|
|
8000334: 4770 bx lr
|
|
8000336: bf00 nop
|
|
8000338: 40023800 andmi r3, r2, r0, lsl #16
|
|
800033c: 20000000 andcs r0, r0, r0
|
|
8000340: 00f42400 rscseq r2, r4, r0, lsl #8
|
|
8000344: 007a1200 rsbseq r1, sl, r0, lsl #4
|
|
8000348: 08000600 stmdaeq r0, {r9, sl}
|
|
|
|
0800034c <SetSysClock>:
|
|
800034c: b480 push {r7}
|
|
800034e: b083 sub sp, #12
|
|
8000350: af00 add r7, sp, #0
|
|
8000352: 2300 movs r3, #0
|
|
8000354: 607b str r3, [r7, #4]
|
|
8000356: 2300 movs r3, #0
|
|
8000358: 603b str r3, [r7, #0]
|
|
800035a: 4b36 ldr r3, [pc, #216] @ (8000434 <SetSysClock+0xe8>)
|
|
800035c: 681b ldr r3, [r3, #0]
|
|
800035e: 4a35 ldr r2, [pc, #212] @ (8000434 <SetSysClock+0xe8>)
|
|
8000360: f443 3380 orr.w r3, r3, #65536 @ 0x10000
|
|
8000364: 6013 str r3, [r2, #0]
|
|
8000366: 4b33 ldr r3, [pc, #204] @ (8000434 <SetSysClock+0xe8>)
|
|
8000368: 681b ldr r3, [r3, #0]
|
|
800036a: f403 3300 and.w r3, r3, #131072 @ 0x20000
|
|
800036e: 603b str r3, [r7, #0]
|
|
8000370: 687b ldr r3, [r7, #4]
|
|
8000372: 3301 adds r3, #1
|
|
8000374: 607b str r3, [r7, #4]
|
|
8000376: 683b ldr r3, [r7, #0]
|
|
8000378: 2b00 cmp r3, #0
|
|
800037a: d103 bne.n 8000384 <SetSysClock+0x38>
|
|
800037c: 687b ldr r3, [r7, #4]
|
|
800037e: f5b3 6fa0 cmp.w r3, #1280 @ 0x500
|
|
8000382: d1f0 bne.n 8000366 <SetSysClock+0x1a>
|
|
8000384: 4b2b ldr r3, [pc, #172] @ (8000434 <SetSysClock+0xe8>)
|
|
8000386: 681b ldr r3, [r3, #0]
|
|
8000388: f403 3300 and.w r3, r3, #131072 @ 0x20000
|
|
800038c: 2b00 cmp r3, #0
|
|
800038e: d002 beq.n 8000396 <SetSysClock+0x4a>
|
|
8000390: 2301 movs r3, #1
|
|
8000392: 603b str r3, [r7, #0]
|
|
8000394: e001 b.n 800039a <SetSysClock+0x4e>
|
|
8000396: 2300 movs r3, #0
|
|
8000398: 603b str r3, [r7, #0]
|
|
800039a: 683b ldr r3, [r7, #0]
|
|
800039c: 2b01 cmp r3, #1
|
|
800039e: d142 bne.n 8000426 <SetSysClock+0xda>
|
|
80003a0: 4b24 ldr r3, [pc, #144] @ (8000434 <SetSysClock+0xe8>)
|
|
80003a2: 6c1b ldr r3, [r3, #64] @ 0x40
|
|
80003a4: 4a23 ldr r2, [pc, #140] @ (8000434 <SetSysClock+0xe8>)
|
|
80003a6: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
|
|
80003aa: 6413 str r3, [r2, #64] @ 0x40
|
|
80003ac: 4b22 ldr r3, [pc, #136] @ (8000438 <SetSysClock+0xec>)
|
|
80003ae: 681b ldr r3, [r3, #0]
|
|
80003b0: 4a21 ldr r2, [pc, #132] @ (8000438 <SetSysClock+0xec>)
|
|
80003b2: f443 4380 orr.w r3, r3, #16384 @ 0x4000
|
|
80003b6: 6013 str r3, [r2, #0]
|
|
80003b8: 4b1e ldr r3, [pc, #120] @ (8000434 <SetSysClock+0xe8>)
|
|
80003ba: 4a1e ldr r2, [pc, #120] @ (8000434 <SetSysClock+0xe8>)
|
|
80003bc: 689b ldr r3, [r3, #8]
|
|
80003be: 6093 str r3, [r2, #8]
|
|
80003c0: 4b1c ldr r3, [pc, #112] @ (8000434 <SetSysClock+0xe8>)
|
|
80003c2: 689b ldr r3, [r3, #8]
|
|
80003c4: 4a1b ldr r2, [pc, #108] @ (8000434 <SetSysClock+0xe8>)
|
|
80003c6: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
80003ca: 6093 str r3, [r2, #8]
|
|
80003cc: 4b19 ldr r3, [pc, #100] @ (8000434 <SetSysClock+0xe8>)
|
|
80003ce: 689b ldr r3, [r3, #8]
|
|
80003d0: 4a18 ldr r2, [pc, #96] @ (8000434 <SetSysClock+0xe8>)
|
|
80003d2: f443 53a0 orr.w r3, r3, #5120 @ 0x1400
|
|
80003d6: 6093 str r3, [r2, #8]
|
|
80003d8: 4b16 ldr r3, [pc, #88] @ (8000434 <SetSysClock+0xe8>)
|
|
80003da: 4a18 ldr r2, [pc, #96] @ (800043c <SetSysClock+0xf0>)
|
|
80003dc: 605a str r2, [r3, #4]
|
|
80003de: 4b15 ldr r3, [pc, #84] @ (8000434 <SetSysClock+0xe8>)
|
|
80003e0: 681b ldr r3, [r3, #0]
|
|
80003e2: 4a14 ldr r2, [pc, #80] @ (8000434 <SetSysClock+0xe8>)
|
|
80003e4: f043 7380 orr.w r3, r3, #16777216 @ 0x1000000
|
|
80003e8: 6013 str r3, [r2, #0]
|
|
80003ea: bf00 nop
|
|
80003ec: 4b11 ldr r3, [pc, #68] @ (8000434 <SetSysClock+0xe8>)
|
|
80003ee: 681b ldr r3, [r3, #0]
|
|
80003f0: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
|
|
80003f4: 2b00 cmp r3, #0
|
|
80003f6: d0f9 beq.n 80003ec <SetSysClock+0xa0>
|
|
80003f8: 4b11 ldr r3, [pc, #68] @ (8000440 <SetSysClock+0xf4>)
|
|
80003fa: f240 6205 movw r2, #1541 @ 0x605
|
|
80003fe: 601a str r2, [r3, #0]
|
|
8000400: 4b0c ldr r3, [pc, #48] @ (8000434 <SetSysClock+0xe8>)
|
|
8000402: 689b ldr r3, [r3, #8]
|
|
8000404: 4a0b ldr r2, [pc, #44] @ (8000434 <SetSysClock+0xe8>)
|
|
8000406: f023 0303 bic.w r3, r3, #3
|
|
800040a: 6093 str r3, [r2, #8]
|
|
800040c: 4b09 ldr r3, [pc, #36] @ (8000434 <SetSysClock+0xe8>)
|
|
800040e: 689b ldr r3, [r3, #8]
|
|
8000410: 4a08 ldr r2, [pc, #32] @ (8000434 <SetSysClock+0xe8>)
|
|
8000412: f043 0302 orr.w r3, r3, #2
|
|
8000416: 6093 str r3, [r2, #8]
|
|
8000418: bf00 nop
|
|
800041a: 4b06 ldr r3, [pc, #24] @ (8000434 <SetSysClock+0xe8>)
|
|
800041c: 689b ldr r3, [r3, #8]
|
|
800041e: f003 030c and.w r3, r3, #12
|
|
8000422: 2b08 cmp r3, #8
|
|
8000424: d1f9 bne.n 800041a <SetSysClock+0xce>
|
|
8000426: bf00 nop
|
|
8000428: 370c adds r7, #12
|
|
800042a: 46bd mov sp, r7
|
|
800042c: f85d 7b04 ldr.w r7, [sp], #4
|
|
8000430: 4770 bx lr
|
|
8000432: bf00 nop
|
|
8000434: 40023800 andmi r3, r2, r0, lsl #16
|
|
8000438: 40007000 andmi r7, r0, r0
|
|
800043c: 07405408 strbeq r5, [r0, -r8, lsl #8]
|
|
8000440: 40023c00 andmi r3, r2, r0, lsl #24
|
|
|
|
08000444 <deregister_tm_clones>:
|
|
8000444: 4803 ldr r0, [pc, #12] @ (8000454 <deregister_tm_clones+0x10>)
|
|
8000446: 4b04 ldr r3, [pc, #16] @ (8000458 <deregister_tm_clones+0x14>)
|
|
8000448: 4283 cmp r3, r0
|
|
800044a: d002 beq.n 8000452 <deregister_tm_clones+0xe>
|
|
800044c: 4b03 ldr r3, [pc, #12] @ (800045c <deregister_tm_clones+0x18>)
|
|
800044e: b103 cbz r3, 8000452 <deregister_tm_clones+0xe>
|
|
8000450: 4718 bx r3
|
|
8000452: 4770 bx lr
|
|
8000454: 20000008 andcs r0, r0, r8
|
|
8000458: 20000008 andcs r0, r0, r8
|
|
800045c: 00000000 andeq r0, r0, r0
|
|
|
|
08000460 <register_tm_clones>:
|
|
8000460: 4805 ldr r0, [pc, #20] @ (8000478 <register_tm_clones+0x18>)
|
|
8000462: 4b06 ldr r3, [pc, #24] @ (800047c <register_tm_clones+0x1c>)
|
|
8000464: 1a1b subs r3, r3, r0
|
|
8000466: 0fd9 lsrs r1, r3, #31
|
|
8000468: eb01 01a3 add.w r1, r1, r3, asr #2
|
|
800046c: 1049 asrs r1, r1, #1
|
|
800046e: d002 beq.n 8000476 <register_tm_clones+0x16>
|
|
8000470: 4b03 ldr r3, [pc, #12] @ (8000480 <register_tm_clones+0x20>)
|
|
8000472: b103 cbz r3, 8000476 <register_tm_clones+0x16>
|
|
8000474: 4718 bx r3
|
|
8000476: 4770 bx lr
|
|
8000478: 20000008 andcs r0, r0, r8
|
|
800047c: 20000008 andcs r0, r0, r8
|
|
8000480: 00000000 andeq r0, r0, r0
|
|
|
|
08000484 <__do_global_dtors_aux>:
|
|
8000484: b510 push {r4, lr}
|
|
8000486: 4c06 ldr r4, [pc, #24] @ (80004a0 <__do_global_dtors_aux+0x1c>)
|
|
8000488: 7823 ldrb r3, [r4, #0]
|
|
800048a: b943 cbnz r3, 800049e <__do_global_dtors_aux+0x1a>
|
|
800048c: f7ff ffda bl 8000444 <deregister_tm_clones>
|
|
8000490: 4b04 ldr r3, [pc, #16] @ (80004a4 <__do_global_dtors_aux+0x20>)
|
|
8000492: b113 cbz r3, 800049a <__do_global_dtors_aux+0x16>
|
|
8000494: 4804 ldr r0, [pc, #16] @ (80004a8 <__do_global_dtors_aux+0x24>)
|
|
8000496: f3af 8000 nop.w
|
|
800049a: 2301 movs r3, #1
|
|
800049c: 7023 strb r3, [r4, #0]
|
|
800049e: bd10 pop {r4, pc}
|
|
80004a0: 20000008 andcs r0, r0, r8
|
|
80004a4: 00000000 andeq r0, r0, r0
|
|
80004a8: 080005e8 stmdaeq r0, {r3, r5, r6, r7, r8, sl}
|
|
|
|
080004ac <frame_dummy>:
|
|
80004ac: b508 push {r3, lr}
|
|
80004ae: 4b05 ldr r3, [pc, #20] @ (80004c4 <frame_dummy+0x18>)
|
|
80004b0: b11b cbz r3, 80004ba <frame_dummy+0xe>
|
|
80004b2: 4905 ldr r1, [pc, #20] @ (80004c8 <frame_dummy+0x1c>)
|
|
80004b4: 4805 ldr r0, [pc, #20] @ (80004cc <frame_dummy+0x20>)
|
|
80004b6: f3af 8000 nop.w
|
|
80004ba: e8bd 4008 ldmia.w sp!, {r3, lr}
|
|
80004be: f7ff bfcf b.w 8000460 <register_tm_clones>
|
|
80004c2: bf00 nop
|
|
80004c4: 00000000 andeq r0, r0, r0
|
|
80004c8: 2000000c andcs r0, r0, ip
|
|
80004cc: 080005e8 stmdaeq r0, {r3, r5, r6, r7, r8, sl}
|
|
|
|
080004d0 <Reset_Handler>:
|
|
80004d0: 2100 movs r1, #0
|
|
80004d2: e003 b.n 80004dc <LoopCopyDataInit>
|
|
|
|
080004d4 <CopyDataInit>:
|
|
80004d4: 4b0a ldr r3, [pc, #40] @ (8000500 <LoopFillZerobss+0x10>)
|
|
80004d6: 585b ldr r3, [r3, r1]
|
|
80004d8: 5043 str r3, [r0, r1]
|
|
80004da: 3104 adds r1, #4
|
|
|
|
080004dc <LoopCopyDataInit>:
|
|
80004dc: 4809 ldr r0, [pc, #36] @ (8000504 <LoopFillZerobss+0x14>)
|
|
80004de: 4b0a ldr r3, [pc, #40] @ (8000508 <LoopFillZerobss+0x18>)
|
|
80004e0: 1842 adds r2, r0, r1
|
|
80004e2: 429a cmp r2, r3
|
|
80004e4: d3f6 bcc.n 80004d4 <CopyDataInit>
|
|
80004e6: 4a09 ldr r2, [pc, #36] @ (800050c <LoopFillZerobss+0x1c>)
|
|
80004e8: e002 b.n 80004f0 <LoopFillZerobss>
|
|
|
|
080004ea <FillZerobss>:
|
|
80004ea: 2300 movs r3, #0
|
|
80004ec: f842 3b04 str.w r3, [r2], #4
|
|
|
|
080004f0 <LoopFillZerobss>:
|
|
80004f0: 4b07 ldr r3, [pc, #28] @ (8000510 <LoopFillZerobss+0x20>)
|
|
80004f2: 429a cmp r2, r3
|
|
80004f4: d3f9 bcc.n 80004ea <FillZerobss>
|
|
80004f6: f7ff fe71 bl 80001dc <SystemInit>
|
|
80004fa: f7ff fe45 bl 8000188 <main>
|
|
80004fe: 4770 bx lr
|
|
8000500: 0800061c stmdaeq r0, {r2, r3, r4, r9, sl}
|
|
8000504: 20000000 andcs r0, r0, r0
|
|
8000508: 20000008 andcs r0, r0, r8
|
|
800050c: 20000008 andcs r0, r0, r8
|
|
8000510: 200001bc @ <UNDEFINED> instruction: 0x200001bc
|
|
|
|
08000514 <ADC_IRQHandler>:
|
|
8000514: e7fe b.n 8000514 <ADC_IRQHandler>
|
|
...
|
|
|
|
08000518 <register_fini>:
|
|
8000518: 4b02 ldr r3, [pc, #8] @ (8000524 <register_fini+0xc>)
|
|
800051a: b113 cbz r3, 8000522 <register_fini+0xa>
|
|
800051c: 4802 ldr r0, [pc, #8] @ (8000528 <register_fini+0x10>)
|
|
800051e: f000 b81d b.w 800055c <atexit>
|
|
8000522: 4770 bx lr
|
|
8000524: 00000000 andeq r0, r0, r0
|
|
8000528: 0800052d stmdaeq r0, {r0, r2, r3, r5, r8, sl}
|
|
|
|
0800052c <__libc_fini_array>:
|
|
800052c: b538 push {r3, r4, r5, lr}
|
|
800052e: 4d07 ldr r5, [pc, #28] @ (800054c <__libc_fini_array+0x20>)
|
|
8000530: 4c07 ldr r4, [pc, #28] @ (8000550 <__libc_fini_array+0x24>)
|
|
8000532: 1b2c subs r4, r5, r4
|
|
8000534: 10a4 asrs r4, r4, #2
|
|
8000536: d005 beq.n 8000544 <__libc_fini_array+0x18>
|
|
8000538: 3c01 subs r4, #1
|
|
800053a: f855 3d04 ldr.w r3, [r5, #-4]!
|
|
800053e: 4798 blx r3
|
|
8000540: 2c00 cmp r4, #0
|
|
8000542: d1f9 bne.n 8000538 <__libc_fini_array+0xc>
|
|
8000544: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
|
|
8000548: f000 b854 b.w 80005f4 <_fini>
|
|
800054c: 0800061c stmdaeq r0, {r2, r3, r4, r9, sl}
|
|
8000550: 08000618 stmdaeq r0, {r3, r4, r9, sl}
|
|
|
|
08000554 <__retarget_lock_acquire_recursive>:
|
|
8000554: 4770 bx lr
|
|
8000556: bf00 nop
|
|
|
|
08000558 <__retarget_lock_release_recursive>:
|
|
8000558: 4770 bx lr
|
|
800055a: bf00 nop
|
|
|
|
0800055c <atexit>:
|
|
800055c: 2300 movs r3, #0
|
|
800055e: 4601 mov r1, r0
|
|
8000560: 461a mov r2, r3
|
|
8000562: 4618 mov r0, r3
|
|
8000564: f000 b800 b.w 8000568 <__register_exitproc>
|
|
|
|
08000568 <__register_exitproc>:
|
|
8000568: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
|
|
800056c: 4d1b ldr r5, [pc, #108] @ (80005dc <__register_exitproc+0x74>)
|
|
800056e: 4606 mov r6, r0
|
|
8000570: 6828 ldr r0, [r5, #0]
|
|
8000572: 4698 mov r8, r3
|
|
8000574: 460f mov r7, r1
|
|
8000576: 4691 mov r9, r2
|
|
8000578: f7ff ffec bl 8000554 <__retarget_lock_acquire_recursive>
|
|
800057c: 4b18 ldr r3, [pc, #96] @ (80005e0 <__register_exitproc+0x78>)
|
|
800057e: 681c ldr r4, [r3, #0]
|
|
8000580: b31c cbz r4, 80005ca <__register_exitproc+0x62>
|
|
8000582: 6828 ldr r0, [r5, #0]
|
|
8000584: 6865 ldr r5, [r4, #4]
|
|
8000586: 2d1f cmp r5, #31
|
|
8000588: dc22 bgt.n 80005d0 <__register_exitproc+0x68>
|
|
800058a: b94e cbnz r6, 80005a0 <__register_exitproc+0x38>
|
|
800058c: 1c6b adds r3, r5, #1
|
|
800058e: 3502 adds r5, #2
|
|
8000590: 6063 str r3, [r4, #4]
|
|
8000592: f844 7025 str.w r7, [r4, r5, lsl #2]
|
|
8000596: f7ff ffdf bl 8000558 <__retarget_lock_release_recursive>
|
|
800059a: 2000 movs r0, #0
|
|
800059c: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
|
|
80005a0: eb04 0185 add.w r1, r4, r5, lsl #2
|
|
80005a4: 2301 movs r3, #1
|
|
80005a6: f8c1 9088 str.w r9, [r1, #136] @ 0x88
|
|
80005aa: f8d4 2188 ldr.w r2, [r4, #392] @ 0x188
|
|
80005ae: 40ab lsls r3, r5
|
|
80005b0: 431a orrs r2, r3
|
|
80005b2: 2e02 cmp r6, #2
|
|
80005b4: f8c4 2188 str.w r2, [r4, #392] @ 0x188
|
|
80005b8: f8c1 8108 str.w r8, [r1, #264] @ 0x108
|
|
80005bc: d1e6 bne.n 800058c <__register_exitproc+0x24>
|
|
80005be: f8d4 218c ldr.w r2, [r4, #396] @ 0x18c
|
|
80005c2: 431a orrs r2, r3
|
|
80005c4: f8c4 218c str.w r2, [r4, #396] @ 0x18c
|
|
80005c8: e7e0 b.n 800058c <__register_exitproc+0x24>
|
|
80005ca: 4c06 ldr r4, [pc, #24] @ (80005e4 <__register_exitproc+0x7c>)
|
|
80005cc: 601c str r4, [r3, #0]
|
|
80005ce: e7d8 b.n 8000582 <__register_exitproc+0x1a>
|
|
80005d0: f7ff ffc2 bl 8000558 <__retarget_lock_release_recursive>
|
|
80005d4: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
|
|
80005d8: e7e0 b.n 800059c <__register_exitproc+0x34>
|
|
80005da: bf00 nop
|
|
80005dc: 20000004 andcs r0, r0, r4
|
|
80005e0: 20000024 andcs r0, r0, r4, lsr #32
|
|
80005e4: 2000002c andcs r0, r0, ip, lsr #32
|
|
|
|
080005e8 <_init>:
|
|
80005e8: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
80005ea: bf00 nop
|
|
80005ec: bcf8 pop {r3, r4, r5, r6, r7}
|
|
80005ee: bc08 pop {r3}
|
|
80005f0: 469e mov lr, r3
|
|
80005f2: 4770 bx lr
|
|
|
|
080005f4 <_fini>:
|
|
80005f4: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
80005f6: bf00 nop
|
|
80005f8: bcf8 pop {r3, r4, r5, r6, r7}
|
|
80005fa: bc08 pop {r3}
|
|
80005fc: 469e mov lr, r3
|
|
80005fe: 4770 bx lr
|
|
|
|
Disassembly of section .rodata:
|
|
|
|
08000600 <AHBPrescTable>:
|
|
...
|
|
8000608: 04030201 streq r0, [r3], #-513 @ 0xfffffdff
|
|
800060c: 09080706 stmdbeq r8, {r1, r2, r8, r9, sl}
|
|
|
|
Disassembly of section .init_array:
|
|
|
|
08000610 <__init_array_start>:
|
|
8000610: 08000519 stmdaeq r0, {r0, r3, r4, r8, sl}
|
|
|
|
08000614 <__frame_dummy_init_array_entry>:
|
|
8000614: 080004ad stmdaeq r0, {r0, r2, r3, r5, r7, sl}
|
|
|
|
Disassembly of section .fini_array:
|
|
|
|
08000618 <__do_global_dtors_aux_fini_array_entry>:
|
|
8000618: 08000485 stmdaeq r0, {r0, r2, r7, sl}
|
|
|
|
Disassembly of section .data:
|
|
|
|
20000000 <SystemCoreClock>:
|
|
20000000: 0a037a00 beq 200de808 <_estack+0xae808>
|
|
|
|
20000004 <__atexit_recursive_mutex>:
|
|
20000004: 20000028 andcs r0, r0, r8, lsr #32
|
|
|
|
Disassembly of section .ARM.attributes:
|
|
|
|
00000000 <.ARM.attributes>:
|
|
0: 00002f41 andeq r2, r0, r1, asr #30
|
|
4: 61656100 cmnvs r5, r0, lsl #2
|
|
8: 01006962 tsteq r0, r2, ror #18
|
|
c: 00000025 andeq r0, r0, r5, lsr #32
|
|
10: 2d453705 stclcs 7, cr3, [r5, #-20] @ 0xffffffec
|
|
14: 0d06004d stceq 0, cr0, [r6, #-308] @ 0xfffffecc
|
|
18: 02094d07 andeq r4, r9, #448 @ 0x1c0
|
|
1c: 0412060a ldreq r0, [r2], #-1546 @ 0xfffff9f6
|
|
20: 01150114 tsteq r5, r4, lsl r1
|
|
24: 01180317 tsteq r8, r7, lsl r3
|
|
28: 011b011a tsteq fp, sl, lsl r1
|
|
2c: 0122011c @ <UNDEFINED> instruction: 0x0122011c
|
|
|
|
Disassembly of section .comment:
|
|
|
|
00000000 <.comment>:
|
|
0: 3a434347 bcc 10d0d24 <_Min_Stack_Size+0x10d0924>
|
|
4: 72412820 subvc r2, r1, #32, 16 @ 0x200000
|
|
8: 4e47206d cdpmi 0, 4, cr2, cr7, cr13, {3}
|
|
c: 6f542055 svcvs 0x00542055
|
|
10: 68636c6f stmdavs r3!, {r0, r1, r2, r3, r5, r6, sl, fp, sp, lr}^
|
|
14: 206e6961 rsbcs r6, lr, r1, ror #18
|
|
18: 322e3331 eorcc r3, lr, #-1006632960 @ 0xc4000000
|
|
1c: 6c65722e sfmvs f7, 2, [r5], #-184 @ 0xffffff48
|
|
20: 42282031 eormi r2, r8, #49 @ 0x31
|
|
24: 646c6975 strbtvs r6, [ip], #-2421 @ 0xfffff68b
|
|
28: 6d726120 ldfvse f6, [r2, #-128]! @ 0xffffff80
|
|
2c: 2e33312d rsfcssp f3, f3, #5.0
|
|
30: 20292937 eorcs r2, r9, r7, lsr r9
|
|
34: 322e3331 eorcc r3, lr, #-1006632960 @ 0xc4000000
|
|
38: 3220312e eorcc r3, r0, #-2147483637 @ 0x8000000b
|
|
3c: 31333230 teqcc r3, r0, lsr r2
|
|
40: 00393030 eorseq r3, r9, r0, lsr r0
|
|
|
|
Disassembly of section .debug_frame:
|
|
|
|
00000000 <.debug_frame>:
|
|
0: 0000000c andeq r0, r0, ip
|
|
4: ffffffff @ <UNDEFINED> instruction: 0xffffffff
|
|
8: 7c020001 stcvc 0, cr0, [r2], {1}
|
|
c: 000d0c0e andeq r0, sp, lr, lsl #24
|
|
10: 0000000c andeq r0, r0, ip
|
|
14: 00000000 andeq r0, r0, r0
|
|
18: 08000518 stmdaeq r0, {r3, r4, r8, sl}
|
|
1c: 00000014 andeq r0, r0, r4, lsl r0
|
|
20: 00000038 andeq r0, r0, r8, lsr r0
|
|
...
|
|
2c: 000000c0 andeq r0, r0, r0, asr #1
|
|
30: 84240e42 strthi r0, [r4], #-3650 @ 0xfffff1be
|
|
34: 86088509 strhi r8, [r8], -r9, lsl #10
|
|
38: 88068707 stmdahi r6, {r0, r1, r2, r8, r9, sl, pc}
|
|
3c: 8a048905 bhi 122458 <_Min_Stack_Size+0x122058>
|
|
40: 8e028b03 vmlahi.f64 d8, d2, d3
|
|
44: 300e4301 andcc r4, lr, r1, lsl #6
|
|
48: 240e0a76 strcs r0, [lr], #-2678 @ 0xfffff58a
|
|
4c: cacbce42 bgt ff2f395c <_estack+0xdf2c395c>
|
|
50: c6c7c8c9 strbgt ip, [r7], r9, asr #17
|
|
54: 000ec4c5 andeq ip, lr, r5, asr #9
|
|
58: 00000b42 andeq r0, r0, r2, asr #22
|
|
5c: 0000000c andeq r0, r0, ip
|
|
60: ffffffff @ <UNDEFINED> instruction: 0xffffffff
|
|
64: 7c020001 stcvc 0, cr0, [r2], {1}
|
|
68: 000d0c0e andeq r0, sp, lr, lsl #24
|
|
6c: 00000020 andeq r0, r0, r0, lsr #32
|
|
70: 0000005c andeq r0, r0, ip, asr r0
|
|
74: 0800052c stmdaeq r0, {r2, r3, r5, r8, sl}
|
|
78: 00000028 andeq r0, r0, r8, lsr #32
|
|
7c: 83100e41 tsthi r0, #1040 @ 0x410
|
|
80: 85038404 strhi r8, [r3, #-1028] @ 0xfffffbfc
|
|
84: 4d018e02 stcmi 14, cr8, [r1, #-8]
|
|
88: c3c4c5ce bicgt ip, r4, #864026624 @ 0x33800000
|
|
8c: 0000000e andeq r0, r0, lr
|
|
90: 0000000c andeq r0, r0, ip
|
|
94: ffffffff @ <UNDEFINED> instruction: 0xffffffff
|
|
98: 7c020001 stcvc 0, cr0, [r2], {1}
|
|
9c: 000d0c0e andeq r0, sp, lr, lsl #24
|
|
a0: 0000000c andeq r0, r0, ip
|
|
a4: 00000090 muleq r0, r0, r0
|
|
a8: 00000000 andeq r0, r0, r0
|
|
ac: 00000002 andeq r0, r0, r2
|
|
b0: 0000000c andeq r0, r0, ip
|
|
b4: 00000090 muleq r0, r0, r0
|
|
b8: 00000000 andeq r0, r0, r0
|
|
bc: 00000002 andeq r0, r0, r2
|
|
c0: 0000000c andeq r0, r0, ip
|
|
c4: 00000090 muleq r0, r0, r0
|
|
c8: 00000000 andeq r0, r0, r0
|
|
cc: 00000002 andeq r0, r0, r2
|
|
d0: 0000000c andeq r0, r0, ip
|
|
d4: 00000090 muleq r0, r0, r0
|
|
d8: 00000000 andeq r0, r0, r0
|
|
dc: 00000002 andeq r0, r0, r2
|
|
e0: 0000000c andeq r0, r0, ip
|
|
e4: 00000090 muleq r0, r0, r0
|
|
e8: 00000000 andeq r0, r0, r0
|
|
ec: 00000002 andeq r0, r0, r2
|
|
f0: 0000000c andeq r0, r0, ip
|
|
f4: 00000090 muleq r0, r0, r0
|
|
f8: 08000554 stmdaeq r0, {r2, r4, r6, r8, sl}
|
|
fc: 00000002 andeq r0, r0, r2
|
|
100: 0000000c andeq r0, r0, ip
|
|
104: 00000090 muleq r0, r0, r0
|
|
108: 00000000 andeq r0, r0, r0
|
|
10c: 00000004 andeq r0, r0, r4
|
|
110: 0000000c andeq r0, r0, ip
|
|
114: 00000090 muleq r0, r0, r0
|
|
118: 00000000 andeq r0, r0, r0
|
|
11c: 00000004 andeq r0, r0, r4
|
|
120: 0000000c andeq r0, r0, ip
|
|
124: 00000090 muleq r0, r0, r0
|
|
128: 00000000 andeq r0, r0, r0
|
|
12c: 00000002 andeq r0, r0, r2
|
|
130: 0000000c andeq r0, r0, ip
|
|
134: 00000090 muleq r0, r0, r0
|
|
138: 08000558 stmdaeq r0, {r3, r4, r6, r8, sl}
|
|
13c: 00000002 andeq r0, r0, r2
|
|
140: 0000000c andeq r0, r0, ip
|
|
144: ffffffff @ <UNDEFINED> instruction: 0xffffffff
|
|
148: 7c020001 stcvc 0, cr0, [r2], {1}
|
|
14c: 000d0c0e andeq r0, sp, lr, lsl #24
|
|
150: 0000000c andeq r0, r0, ip
|
|
154: 00000140 andeq r0, r0, r0, asr #2
|
|
158: 0800055c stmdaeq r0, {r2, r3, r4, r6, r8, sl}
|
|
15c: 0000000c andeq r0, r0, ip
|
|
160: 0000000c andeq r0, r0, ip
|
|
164: ffffffff @ <UNDEFINED> instruction: 0xffffffff
|
|
168: 7c020001 stcvc 0, cr0, [r2], {1}
|
|
16c: 000d0c0e andeq r0, sp, lr, lsl #24
|
|
170: 00000020 andeq r0, r0, r0, lsr #32
|
|
174: 00000160 andeq r0, r0, r0, ror #2
|
|
178: 08000568 stmdaeq r0, {r3, r5, r6, r8, sl}
|
|
17c: 00000080 andeq r0, r0, r0, lsl #1
|
|
180: 83200e42 @ <UNDEFINED> instruction: 0x83200e42
|
|
184: 85078408 strhi r8, [r7, #-1032] @ 0xfffffbf8
|
|
188: 87058606 strhi r8, [r5, -r6, lsl #12]
|
|
18c: 89038804 stmdbhi r3, {r2, fp, pc}
|
|
190: 00018e02 andeq r8, r1, r2, lsl #28
|